This invention relates generally to switchable current source circuitry and more particularly to current source circuitry adapted to couple, or decouple, a current source to, or from, a load, selectively in accordance with the logical states of a plurality of logic signals.
As is known in the art, it is frequently desired to couple, or decouple, a current source to, or from, a load selectively in accordance with a predetermined combination of the logical states of a plurality of logic signals. This desired result may be accomplished by first feeding the logic signals to a logic gate, such as a NAND gate or NOR gate, to provide an output signal which is a function of the desired logical combination of the plurality of logic signals, and then subsequently using the gate's output signal as a control signal for an electronic switch disposed between the current source and the load. The switch, in response to the gate's output signal, would then couple or decouple the current source and the load selectively, in accordance with such output signal.
One such application for coupling, or decoupling a current source and a load selectively in accordance with a plurality of logic signals is in one type of switching voltage regulator. In such regulator, the regulated output voltage is fed back to one input of a comparator. The output of the comparator and the output of an oscillator are fed as inputs to a logic gate. The output of the oscillator periodically alternates between a logic 1 state and a logic 0 state. A second input to the comparator is fed to a reference potential such that the output of the comparator is a logic 1 state (when the magnitude of the voltage being regulated is lower than desired) and is a logic 0 state (when the magnitude of the voltage being regulated is at, or greater than, the desired voltage). When the voltage being regulated is less than the desired level, a control signal is produced to enable current from a current source to couple an output circuit which, in response to such current, increases the level of the output voltage. On the other hand, when the voltage being regulated finally rises to the desired output voltage, the control signal decouples the current source from the output circuit until such time as the level of the voltage being regulated falls below its desired, regulated level; in which case, the process repeats. Thus, it can be seen that the desired regulation may be achieved by feeding the outputs of the oscillator and the comparator to an AND (or NAND) gate; the output of such gate producing the above-mentioned control signal; such control signal being a periodic signal having a duty cycle which varies from 50% (as when the circuit is out of regulation or being "powered up") to approaching 0% (as when the circuit is in regulation).
Thus, while implementation of these circuits using separate components, i.e. separate oscillator, comparator and logic gate, is possible, the larger number of components to be so implemented generally increases the power dissipation of the regulator and also slows its response time.